The field of FPGA and chiplet-based systems is moving towards more efficient and optimized designs. Researchers are focusing on developing new techniques to reduce power consumption, improve performance, and increase accuracy. One of the key areas of research is the optimization of FIFO sizing, low-power design synthesis, and eigenvalue dataset generation. These innovations have the potential to significantly impact the development of deep learning accelerators, computing-in-memory architectures, and other applications. Noteworthy papers include: FIFOAdvisor, which achieves significant runtime speedups and memory reductions; Simopt-Power, which reduces dynamic power dissipation by leveraging simulation metadata; Accelerating Eigenvalue Dataset Generation via Chebyshev Subspace Filter, which accelerates eigenvalue data generation; CHIPSIM, which provides a comprehensive co-simulation framework for deep learning on chiplet-based systems; MIREDO, which formulates dataflow optimization as a Mixed-Integer Programming problem to enhance performance in computing-in-memory accelerators.