Advances in Memory-Centric Computing and Security

The field of computer architecture is witnessing a significant shift towards memory-centric computing, with a focus on improving performance, energy efficiency, and security. Recent research has explored the potential of 3D-stacked High-Bandwidth Memory (HBM) architectures, compute-in-SRAM devices, and processing-in-memory (PIM) paradigms to address the memory wall challenge. Additionally, there is a growing concern about thermal vulnerabilities in these architectures, which can be exploited to launch thermal performance degradation attacks. To mitigate these risks, researchers are developing innovative solutions, such as bandwidth-optimized oblivious map accelerators and scalable frameworks for resilient memory design. Noteworthy papers in this area include:

  • BOLT, which achieves significant speedups in initialization and query time over state-of-the-art OMAPs,
  • IM-PIR, which proposes the first PIM-based architecture for multi-server private information retrieval,
  • BitROM, which enables practical and efficient Large Language Model inference at the edge through co-design with BitNet's 1.58-bit quantization model.

Sources

On the Thermal Vulnerability of 3D-Stacked High-Bandwidth Memory Architectures

Parallelizing Drug Discovery: HPC Pipelines for Alzheimer's Molecular Docking and Simulation

BOLT: Bandwidth-Optimized Lightning-Fast Oblivious Map powered by Secure HBM Accelerators

Characterizing and Optimizing Realistic Workloads on a Commercial Compute-in-SRAM Device

SCREME: A Scalable Framework for Resilient Memory Design

IM-PIR: In-Memory Private Information Retrieval

Lifetime-Aware Design of Item-Level Intelligence

BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference

Memshare: Memory Sharing for Multicore Computation in R with an Application to Feature Selection by Mutual Information using PDE

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