The field of electronic design automation and circuit performance is witnessing significant advancements, driven by innovative applications of machine learning and hardware-aware approaches. Researchers are exploring new methods to improve the accuracy and efficiency of circuit design and performance prediction, such as graph neural networks and probabilistic flow models. Additionally, there is a growing focus on developing low-power and high-resolution circuit components, including phase frequency detectors and CMOS low-noise amplifiers. Noteworthy papers in this area include: Fast and Accurate RFIC Performance Prediction via Pin Level Graph Neural Networks and Probabilistic Flow, which proposes a lightweight and data-efficient graph neural network model for predicting key performance metrics of active RF circuits. LLMulator: Generalizable Cost Modeling for Dataflow Accelerators with Input-Adaptive Control Flow, which presents a progressive numeric modeling framework leveraging pre-trained large language models for robust performance prediction. SwizzlePerf: Hardware-Aware LLMs for GPU Kernel Performance Optimization, which automatically generates spatial optimizations for GPU kernels on disaggregated architectures by giving LLMs explicit hardware-awareness.