The field of RISC-V and neuromorphic computing is witnessing significant developments, with a focus on improving energy efficiency and performance. Researchers are exploring custom ISA extensions and bespoke hardware expansions to accelerate spiking neural network processing, which promises to provide high energy efficiency due to the sparsity of spiking events. Additionally, there is a growing interest in applying RISC-V to high-performance computing, with evaluations of new architectures and upgrades to existing ones. The convergence of hardware and algorithms is also being investigated, with a focus on cross-layer design and co-design methodologies for vector-symbolic computing. Noteworthy papers include: IzhiRISC-V, which presents a RISC-V-based processor with custom ISA extension for spiking neuron networks processing. Cross-Layer Design of Vector-Symbolic Computing, which provides a comprehensive discourse on the convergence of hardware and algorithms in the context of VSAs. Accelerating GenAI Workloads by Enabling RISC-V Microkernel Support in IREE, which enables RISC-V microkernel support in IREE, an MLIR-based machine learning compiler and runtime.