The field of hardware design and verification is experiencing a significant shift towards the adoption of large language models (LLMs) as a key tool for improving design efficiency and accuracy. Recent research has demonstrated the potential of LLMs in generating syntactically correct RTL code, optimizing prefix adders, and even assisting in root cause analysis of design failures. The use of LLMs in fuzz testing and code generation has also shown promise, with techniques such as Fuzzing Guidance and chain-of-thought prompting enabling more effective and efficient testing and design.

Notable papers in this area include: FuzzFeed, which proposes the combination of LLMs and fuzz testing for generating weakest preconditions. FrameShift, which introduces a novel technique for preserving the structure of inputs during mutation, improving the performance of coverage-guided fuzzers. PrefixAgent, which uses LLMs to optimize prefix adder design, resulting in consistently smaller areas compared to baseline methods. SLDB, which provides a benchmark suite for evaluating LLMs in system-level integration and configuration tasks. Towards LLM-based Root Cause Analysis of Hardware Design Failures, which explores the use of LLMs in explaining the root cause of design issues and bugs. Are They All Good, which evaluates the quality of chain-of-thought prompting techniques in LLM-based code generation, highlighting key challenges and directions for improvement.