The field of memory systems and data processing is witnessing significant advancements, driven by the need to improve performance, reduce costs, and enhance reliability. A key direction in this area is the development of innovative techniques for efficient memory tiering, near-data processing, and processing-in-memory acceleration. These approaches aim to optimize memory utilization, minimize data movement, and maximize processing capabilities. Notable developments include the design of host-agnostic memory tiering techniques, memory channel controllers for modern disaggregated memory systems, and FPGA-based infrastructures for rapid evaluation of emerging DRAM techniques. Some papers are particularly noteworthy, including:

• A proposal for a host-agnostic technique that exploits two-level address translation to consolidate scattered and skewed accesses, resulting in improved near memory utilization.
• An introduction to EasyDRAM, an FPGA-based framework for rapid and accurate end-to-end evaluation of DRAM techniques, which overcomes the limitations of prior platforms by enabling implementation in a high-level language and accurately modeling modern computing systems.
• A presentation of MARS, a storage-centric system that accelerates raw signal genome analysis through a novel hardware/software co-design approach, achieving significant performance and energy efficiency gains.