The field of neural processing units (NPUs) and neuro-symbolic AI (NSAI) is experiencing significant advancements, driven by the need for efficient, expressive, and extensible programming interfaces. Researchers are focusing on developing innovative solutions to address the challenges of leveraging accelerator capabilities, including low-level programming toolkits and high-level programming frameworks. One of the key directions is the development of versatile and flexible acceleration frameworks tailored to NSAI workloads, which can achieve high efficiency, scalability, and versatility. Additionally, there is a growing interest in exploring the potential of field-programmable gate arrays (FPGAs) in NPU and NSAI applications, including the development of novel hardware architectures and high-level programming languages. These advancements have the potential to enable real-time generalizable NSAI algorithms acceleration and rapid data encryption in high-speed wireless communication networks. Notable papers in this area include NSFlow, which proposes an FPGA-based acceleration framework for NSAI systems, and Coyote v2, which presents an open-source FPGA shell with a novel hierarchical design supporting dynamic partial reconfiguration of services and user logic.